1. Field of the Invention
This invention relates generally to the field of computer processors. More particularly, the invention relates to a heterogeneous processor apparatus and method.
2. Description of the Related Art
Heterogeneous computing architectures provide unique advantages over homogenous architectures because more than one type of compute element is available to perform computation tasks. Different compute elements (also referred to as “processing elements” or “functional units”) are better suited than others for different tasks. For example, compute element A is faster than compute element B when running task X, but compute element A might be slower than compute element B when running task V. Hardware that contains both compute elements A and B is therefore more efficient at running a combination of tasks X and V, than hardware that only contains compute elements of type A or B.
In spite of the well-known advantages of heterogeneous computing architectures, there are few examples of heterogeneous computing for CPU cores in the real world. These architectures require software to know how to schedule tasks appropriately to each CPU core types (in this case the compute elements are CPU cores). As hardware evolves and core types change, it is very difficult for software (e.g., operating systems) to keep track of the different types of CPU cores which are available and how to harness heterogeneity effectively. For this reason, there is no core heterogeneity support in mainstream operating systems such as Windows® and Linux, and there is unlikely to be widespread support for this functionality in the near future.